1. Field of the Invention
The present invention relates to a fringe field switching mode liquid crystal display, and more particularly a fringe field driving liquid crystal display in which the structure is transformed to prevent shorts between a gate bus line and a common bus line.
2. Description of the Related Art
A thin film transistor liquid crystal display (hereinafter referred as TFT-LCD) generally has advantages of light weight, thin thickness and low power consumption. Therefore, it has been substituted for Cathode-ray tube (CRT) in a terminal of information apparatus and a video unit, and recently, it is widely used in a notebook PC and monitor market.
The TFT-LCD comprises an array substrate and a color filter, which are combined with a liquid crystal layer interposed between them. The array substrate has a structure that TFTs are disposed in each pixel arranged in a matrix type and the color filter substrate has a structure that a red, a green and a blue color filters are arranged corresponding to each pixel.
The TFT-LCD has been adopted TN (Twist Nematic) mode as a driving mode, however, the TN mode LCD has a disadvantage of narrow viewing angle. Accordingly, in order to solve the problem, an In-Plain Switching (hereinafter referred as IPS) mode has been proposed.
The IPS mode LCD has a wide viewing angle, however, it has disadvantages of a low aperture ratio and a low transmittance since a counter electrode and a pixel electrode are made of opaque metals. A fringe field switching (hereinafter referred as FFS) mode LCD has been proposed in order to improve the aperture ratio and transmittance of the IPS mode LCD.
In the FFS mode LCD, the counter electrode and the pixel electrode are made of transparent conductors and are designed which the distance between electrodes is narrower than that between substrates. And liquid crystals having negative dielectric anisotropy are used in the FFS mode LCD. Accordingly, a fringe field is formed between the electrodes and the liquid crystals on the electrodes are also driven by the fringe field, thereby realizing high brightness as well as wide viewing angle.
FIG. 1 shows an array substrate of a conventional FFS mode LCD. As shown in FIG. 1, a gate bus line (2) and a data bus line (6) are cross-arranged, thereby defining a unit pixel area. A TFT (10) is arranged as a switching device near the intersection of the gate bus line (2) and the data bus line (6). The TFT (10) comprises a gate electrode that is a part of the gate bus line, a semiconductor layer (3) on the gate electrode, a drain electrode (6b) overlapping with one side of the semiconductor layer (3), being protrude from the data bus line (6), and a source electrode (6a) overlapping with the other side of the semiconductor layer (3).
A counter electrode (5) is disposed in a unit pixel area. The counter electrode (5) made of a transparent conductor and has a plate shape. A part of the counter electrode (5) is electrically in contact with a common bus line (4), thereby continuously applying common signals from the common bus line (4).
The common bus line (4) comprises a first part (4a) disposed in parallel with the gate bus line (2), being electrically in contact with the counter electrode (5) and a second part (4b) which is extended from the first part (4a) to be in parallel with the data bus line (6) in a unit pixel, being in contact with both edges of the counter electrode (5) to be a shading means.
A pixel electrode (7) is disposed in a unit pixel to overlap with the counter electrode (5). The pixel electrode (7) made of a transparent conductor and is formed in a slit shape comprising a plurality of slits disposed in parallel with the data bus line (6). The pixel electrode (7) is insulated with the counter electrode (5) by a gate insulating film (not illustrated) and is electrically in contact with a source electrode (6a) of TFT (10).
However, conventional FFS mode LCD has a narrow distance (L1) between a gate bus line and a common bus line, thereby increasing generation probability of shorts between them. As a result, the quality of product is degraded. That is, when a short is generated between the lines, a high voltage loaded on the gate bus line is loaded on the common bus line. Accordingly, the high voltage may cause the common bus line to be defective, thereby deteriorating the product quality.
Therefore, an object of the present invention is to provide a FFS mode LCD preventing the generation of shorts between a gate bus line and a common bus line.
And, another object of the present invention is to provide a FFS mode LCD preventing degradation of products due to a short between the lines.
In order to achieve the above objects, the FFS mode LCD according to the present invention comprises: a transparent insulating substrate; a plurality of gate bus line arranged in selected direction on the transparent insulating substrate, the gate bus line is arranged so that each element of the pair separated at a first distance is arranged a plurality of pairs at a second distance wider than a first distance; a plurality of common bus lines arranged on the centers of each gate bus line separated at the second distance, being in parallel with the gate bus line; a plurality of data bus lines arranged crossing with the gate bus line and common bus line to define a unit pixel; a thin film transistor disposed at the intersection of the gate bus line and data bus line; a counter electrode disposed in a unit pixel area and made of a transparent conductor, being in contact with the common bus line; and a pixel electrode overlapping with the counter electrode in the unit pixel and made of a transparent conductor, being in contact with the thin film transistor.
The counter electrode may be disposed in each unit pixel area or one counter electrode of a body type may be disposed in two unit pixel areas defined by a gate bus line.
The common bus line may be formed in a line type or it may comprise a first part of a line type and a second part. The first part is disposed in parallel with the gate bus line, being in contact with a part of the counter electrode and the second part is protruded from the first part in a unit pixel, disposed in parallel with the data bus line, being in contact with both edges of the counter electrode.